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| Polycrystalline Silicon |
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Polycrystalline silicon
(Chunk) is grayish, opaque and shiny crystalline pieces with no odor.
This product is used for the casting of Multi-Crystalline silicon ingots
and the Czochralski (CZ) pulling of Mono-Crystalline silicon Ingots. Wafers
are formed of highly pure, nearly defect-free single crystalline material.
One process for forming crystalline wafers is known as Czochralski growth
invented by the Polish chemist Jan Czochralski. In this process, a cylindrical
ingot of high purity crystalline silicon is formed by pulling a seed crystal
from a 'melt'. The ingot is then sliced with an inner diameter diamond coated
blade and polished to form wafers |
| Polysilicon is a key component for integrated
circuit and central processing unit manufacturers such as AMD and Intel.
At the component level, polysilicon has long been used as the conducting
gate material in MOSFET and CMOS processing technologies. For these technologies
it is deposited using low-pressure chemical-vapour deposition (LPCVD) reactors
at high temperatures and is usually heavily N or P-doped. |
| More recently, intrinsic and doped polysilicon
is being used in large-area electronics as the active and/or doped layers
in thin-film transistors. Although it can be deposited by LPCVD, plasma-enhanced
chemical vapour deposition (PECVD), or solid-phase crystallization (SPC)
of amorphous silicon in certain processing regimes, these processes still
require relatively high temperatures of at least 300°C. These temperatures
make deposition of polysilicon possible for glass substrates but not for
plastic substrates. The deposition of polycrystalline silicon on plastic
substrates is motivated by the desire to be able to manufacture digital
displays on flexible screens. Therefore, a relatively new technique called
laser crystallization has been devised to crystallize a precursor amorphous
silicon (a-Si) material on a plastic substrate without melting or damaging
the plastic. Short, high-intensity ultraviolet laser pulses are used to
heat the deposited a-Si material to above the melting point of silicon,
without melting the entire substrate. The molten silicon will then crystallize
as it cools. By precisely controlling the temperature gradients, researchers
have been able to grow very large grains, of up to hundreds of micrometers
in size in the extreme case, although grain sizes of 10 nanometres to 1
micrometre are also common. In order to create devices on polysilicon over
large-areas however, a crystal grain size smaller than the device feature
size is needed for homogeneity of the devices. Another method to produce
poly-Si at low temperatures is metal-induced crystallization where an amorphous-Si
thin film can be crystallized at temperatures as low as 150C if annealed
while in contact of another metal film such as aluminium, gold, or silver.
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| Polysilicon has many applications in VLSI manufacturing.
One of its primary uses is as gate electrode material for MOS devices. A
polysilicon gate's electrical conductivity may be increased by depositing
a metal (such as tungsten) or a metal silicide (such as tungsten silicide)
over the gate. Polysilicon may also be employed as a resistor, a conductor,
or as an ohmic contact for shallow junctions, with the desired electrical
conductivity attained by doping the polysilicon material |
| One major difference between polysilicon and
a-Si is that the mobility of the charge carriers of the polysilicon can
be orders of magnitude larger and the material also shows greater stability
under electric field and light-induced stress. This allows more complex,
high-speed circuity to be created on the glass substrate along with the
a-Si devices, which are still needed for their low-leakage characteristics.
When polysilicon and a-Si devices are used in the same process this is called
hybrid processing. A complete polysilicon active layer process is also used
in some cases where a small pixel size is required, such as in projection
displays. |
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| Deposition methods |
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| Polysilicon deposition, or the process of depositing
a layer of polycrystalline silicon on a semiconductor wafer, is achieved
by pyrolyzing silane (SiH4) at 580 to 650 °C. This pyrolysis process releases
hydrogen. |
| Polysilicon layers can be deposited using 100%
silane at a pressure of 25-130 Pa (0.2 to 1.0 Torr) or with 20-30% silane
(diluted in nitrogen) at the same total pressure. Both of these processes
can deposit polysilicon on 10-200 wafers per run, at a rate of 10-20 nm/min
and with thickness uniformities of ±5%. Critical process variables for polysilicon
deposition include temperature, pressure, silane concentration, and dopant
concentration. Wafer spacing and load size have been shown to have only
minor effects on the deposition process. The rate of polysilicon deposition
increases rapidly with temperature, since it follows Arrhenius behavior
(deposition rate =A*exp(-qEa/kT)). The activation energy (Ea) for polysilicon
deposition is about 1.7 eV. Based on this equation, the rate of polysilicon
deposition increases as the deposition temperature increases. There will
be a minimum temperature, however, wherein the rate of deposition becomes
faster than the rate at which unreacted silane arrives at the surface. Beyond
this temperature, the deposition rate can no longer increase with temperature,
since it is now being hampered by lack of silane from which the polysilicon
will be generated. Such a reaction is then said to be 'mass-transport-limited.'
When a polysilicon deposition process becomes mass-transport-limited, the
reaction rate becomes dependent primarily on reactant concentration, reactor
geometry, and gas flow. |
| When the rate at which polysilicon deposition
occurs is slower than the rate at which unreacted silane arrives, then it
is said to be surface-reaction-limited. A deposition process that is surface-reaction-limited
is primarily dependent on reactant concentration and reaction temperature.
Deposition processes must be surface-reaction-limited because they result
in excellent thickness uniformity and step coverage. A plot of the logarithm
of the deposition rate against the reciprocal of the absolute temperature
in the surface-reaction-limited region results in a straight line whose
slope is equal to -qEa/k. |
| At reduced pressure levels for VLSI manufacturing,
polysilicon deposition rate below 575 °C is too slow to be practical. Above
650 °C, poor deposition uniformity and excessive roughness will be encountered
due to unwanted gas-phase reactions and silane depletion. Pressure can be
varied inside a low-pressure reactor either by changing the pumping speed
or changing the inlet gas flow into the reactor. If the inlet gas is composed
of both silane and nitrogen, the inlet gas flow, and hence the reactor pressure,
may be varied either by changing the nitrogen flow at constant silane flow,
or changing both the nitrogen and silane flow to change the total gas flow
while keeping the gas ratio constant. |
| Polysilicon doping, if needed, is also done
during the deposition process, usually by adding phosphine, arsine, or diborane.
Adding phosphine or arsine results in slower deposition, while adding diborane
increases the deposition rate. The deposition thickness uniformity usually
degrades when dopants are added during deposition. |
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| Upgraded metallurgical-grade silicon
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| Upgraded metallurgical-grade (UMG) silicon (also
known as UMG Si) solar cell was created to close the efficiency gap between
industrial multicrystalline and high-efficiency monocrystalline silicon
cell. UMG silicon, which is three orders of magnitude less pure than polysilicon,
is being researched and considered as a cost-effective alternative to polysilicon.
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| A project is targeting 18-22% efficient cells
(upgraded metallurgical silicon could potentially reach efficiencies of
only 0.5 percent less than polysilicon), at manufacturing costs of less
than $1 per peak watt. |
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| And what is now the best? Poly
or Mono? |
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| The latest technology makes that at the moment
we can offer you Poly – Panels that have even higher efficiency than Mono
– Panels. All depends on used technology and quality of the products.
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Closeup
of a polycrystalline cell showing the fingers of conductor material |
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| What RIDDER'S – SOLAR was
doing to bring Poly-Crystalline cells to a higher level?
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- A special kind of glass that is covering the cells = more light
is going trough this glass and the result is a higher efficiency. Glass
is made that the specific wavelength of light as we have in Belgium
will make that the energy yield becomes higher. Lots of time people
are not thinking quite a lot about the glass that is used. But only
this will make a huge difference in efficiency when you compare the
different kinds of glass. Problem is that you can not see this with
your eyes!
- Using only the best Silicon with a tight tolerance to scratches
and other imperfections and with highest level of purity.
- Connection from the individual cells to each other by using the
most modern techniques.
- Special rigid frame to avoid cracks in the crystals during transport,
handling and installation.
- Special cooling system to eliminate most heat during hot days.
- Most up to date assembling from the panels and this by using the
best products for intermediate layers and back-foils.
- Exceptional watertight construction with drain system for condensation.
- 12 years 90% efficiency and 25 years 80% efficiency
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Tests give our products a lifetime up to 40
years All those things together make that we can offer you a superb
Poly-Crystalline PV panel that will serve you years on end and will give
you the highest output. For the moment we can offer you the following
panels (this can always change due to technical advantages) From 5 watt
up to 280 watt per PV panel. As those values can change as said here above,
it is the best to ask info about the evolution we make to offer you the
best. The market is making such an evolution that it is nearly impossible
to keep a website up to date. So, ask the info you need. |
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| Parameter Type |
Maxpower(W) |
Dimension(MM) |
Cell Type |
Weight(kg) |
Imp(A) |
Vmp(V) |
Isc(A) |
Voc(V) |
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